dc.contributor.author | Rosler, Lucas | |
dc.date.accessioned | 2021-11-03T15:53:09Z | |
dc.date.available | 2021-11-03T15:53:09Z | |
dc.date.issued | 2021 | |
dc.identifier.other | .b22817074 | |
dc.identifier.uri | http://hdl.handle.net/1989/16712 | |
dc.language.iso | en_US | en_US |
dc.title | Design and analysis of an FPGA based low tap band-stop FIR filter | en_US |