A digital circuit design implementationusing Abel-Hdland programmable logic devices

Abstract

The purpose of this thesis is twofold. The first is to use ABEL-HDL design software and Programmable Logic Devices (PLD's) to implement the logic ofa digital circuit in a more efficient manner than classic digital design techniques allow. The second is to give enough introductory details about PLD's and the ABEL design process that other students may use this thesis as a guide in learning to use ABEL and PLD's in their digital designs. The thesis explores some ABEL design techniques for programming PLD's and applies the concepts to reducing the total chip count of a digital circuit created by the author using 7400-series logic in a previous graduate course. The results of the experimental design implementation are discussed and ideas given for further study into the topic by future thesis students.