A VHDL-based digital slot machine implementation using a complex programmable logic device /

Abstract

The intent of this project is to provide an educational resource from which future students can learn the basics of programmable logic and the design process involved. More specifically, the area of interest involves very large scale integration (VLSI) design and the advantages associated with it such as reduced chip count and development time. The methodology used within is to first implement a design; using small and medium scale integration (SSI/MSI) packages in order to have a baseline for comparison. The design is then translated for use with the very high speed integrated circuit hardware description language (VHDL) and implemented onto a complex programmable logic device (CPLD). A discussion of this implementation process as well as VHDL lessons is provided to serve as a tutorial for the interested reader. This thesis concludes with a summary of the project results and ideas for future research topics.